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YOU CAN BUILD THE MEASURING CARD CERN IS PUTTING INTO THE LHC

CERN published the schematics for the measuring card going into over a hundred LHC upgrade installations—a single-channel 32-bit ADC with optical isolation and 23 effective bits below 10 Hz.

by Nikolai Beev, CERN TE-EPC

FULL CAD BOM FIRMWARE DOCS

Open-hardwareScience

difficulty
●●●●●
time
several weekends
license
CERN-OHL-W-2.0
repo
repo ACTIVE0 stars

WHAT YOU’LL NEED

Videos
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COMPAREE VERDICT

The OPT-ADC-10k-32b-1cha (HPM7177) is a single-channel 10 kSPS 32-bit ADC card built around the Analog Devices AD7177-2, designed by Nikolai Beev at CERN for the High-Luminosity LHC. It is aimed at very low 1/f noise and excellent short-term stability, with over 23 effective bits of resolution below 10 Hz, and it reads out and synchronises over plastic optical fibre, with an optional isolated USB interface for standalone use. CERN contracted more than a hundred units, delivered from 2023, and the production documentation (main module, ADC mezzanine, power supply and 19-inch chassis) is published on CERN EDMS under the CERN Open Hardware Licence. Marco Reps built one from an earlier revision of the files and filmed it. This is a serious build: you need reflow capability or an assembly service, you source every part yourself, and there is no step-by-step assembly or bring-up guide. Read the scope carefully: the resolution claim is in effective bits for bandwidths below 10 Hz, and full performance relies on the built-in Peltier temperature stabilisation. If you need a general-purpose voltmeter, this is not it. If you need a low-noise, optically isolated digitiser for a specific task and can handle the bring-up, the design is sound and it is out there.

GOOD TO KNOW

  • —Schematics and production documentation for the main module, ADC mezzanine, power supply and 19-inch chassis are published on CERN EDMS under the CERN Open Hardware Licence (commercial use allowed; distributed modifications must use the same licence).
  • —The production documentation names specific parts (AD7177-2, Vishay resistor arrays, plastic-optical-fibre transceivers), but there is no procurement guide or suggested distributors.
  • —Documentation is engineering-grade rather than maker-friendly: the wiki has full specs, an FAQ, the optical-fibre protocol, evaluation reports and published papers, plus a discussion forum. There is no step-by-step assembly manual, calibration procedure or bring-up checklist.
  • —The card uses an FPGA with its own code and firmware; the wiki does not document the gateware toolchain.
  • —The published production documentation is now V4 (main module and ADC mezzanine), linked from the project wiki to CERN EDMS. Marco Reps built an earlier revision, so expect differences from his video.
  • —This is not a turnkey kit. It is a working CERN design released so other labs can build it.

Parts to buy

9 items

From our check of the build. Exact quantities and part numbers are in the creator’s BOM.

  • AD7177-2 ADCFind
  • FPGAFind
  • Plastic-optical-fibre transceiversFind
  • Vishay resistor arraysFind
  • LTZ1000/ADR1000-class voltage referenceFind
  • Peltier temperature stabilisationFind
  • Passive componentsfrom the repo files
  • PCB fabricationFind
  • Optional 19-inch chassis and hardwareFind

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Can I build this?

Printnothing required (PCB fabrication and optional 19-inch enclosure)
BuyAD7177-2 ADC, FPGA, plastic-optical-fibre transceivers, Vishay resistor arrays, LTZ1000/ADR1000-class voltage reference, Peltier temperature stabilisation, passive components, PCB fabrication, optional 19-inch chassis and hardware
Toolsreflow capability or board assembly service, soldering iron for through-hole parts, FPGA toolchain, oscilloscope for bring-up and debug, and a plastic-optical-fibre receiver or the isolated USB link to read data
SkillsSMD assembly or access to assembly service, FPGA gateware compilation and loading, circuit debugging, analog measurement principles, familiarity with precision ADC specs and effective-bit calculations
Timeseveral weekends: PCB ordering and assembly is a week or more off-clock, gateware build and first light is an evening, bring-up and troubleshooting without a guide could be several more evenings depending on what breaks
CostHigh-end band. The project does not publish a cost; the biggest items are the AD7177-2 ADC, the precision resistor arrays and LTZ1000/ADR1000-class reference, the FPGA and the multilayer PCBs, plus the optional 19-inch chassis.
SafetyNone beyond ordinary electronics care. This is low-voltage instrumentation with an optical-fibre read-out; there is no mains on the card itself.

Build at your own risk. Projects involve tools, electronics and sometimes mains voltage — follow the creator’s safety notes.

Videos

Marco Reps build video

Marco walks through the circuit, builds one from an earlier revision of the published files (assembly, soldering, mechanical work, software) and shows the results. The video also includes sponsor segments.

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Gallery

Start here

Navigation into the creator’s own docs — we don’t rewrite the guide, we route you to the source.

  1. 1.Read the project wiki: specs, block diagram, FAQ and links to the production documentation (Start with the specs and block diagram, then the FAQ, the optical-fibre protocol page and the evaluation report linked from the wiki.)
  2. 2.Download the V4 production documentation (schematics, PCB, assembly) from CERN EDMS via the project wiki (Use the latest production documentation linked from the wiki: V4 main module and ADC mezzanine, V3 power supply and chassis.)
  3. 3.Watch Marco Reps assemble one (Shows the physical build from reflow to enclosure. Treat the Keysight clip after 19 minutes as separate context, not a claim about this design.)
  4. 4.Extract the BOM and start sourcing parts(Part numbers are in the schematics. No distributor recommendations are provided.)

Resources

Documentation, files and community threads for this build — we link straight to the original sources and never rehost the creator’s files.

KNOWN ISSUES

  • The design has gone through several revisions since the 2019 prototypes. The current production documentation is V4 (main module and ADC mezzanine), with V3 power supply and chassis—make sure you download those revisions from CERN EDMS before ordering anything.
  • There is no assembly manual or bring-up checklist. You are working from the schematics and block diagram, so budget time for figuring out the correct sequence and troubleshooting without a guide.
  • The card has an FPGA and firmware, and the project wiki lists the hardware production documentation on CERN EDMS. Check what FPGA code is available to you, and with which toolchain, before you build; changing the 10 kSPS sample rate would need changes to the FPGA code and firmware.
  • CERN specifies resolution in effective bits, not digits. A claim of '23 effective bits below 10 Hz' is not the same as an 8.5-digit meter spec, and the performance is bandwidth-dependent—do not treat this as a direct replacement for a bench multimeter.
  • Precision parts are not cheap in single quantities: the AD7177-2, the precision resistor arrays and the LTZ1000/ADR1000-class reference dominate the bill. Price the BOM from the EDMS documentation before you commit.
  • Without a calibration procedure in the documentation, you will need to validate the card's performance yourself if absolute accuracy matters for your application.

Is this actually in use at CERN?

Yes. It was designed by Nikolai Beev in CERN's TE-EPC group for the High-Luminosity LHC. A contract for more than 100 units was signed in 2022 with Norcott Technologies, and the first units were delivered in 2023.

Can I use this as a bench multimeter?

Not directly. It is a single-channel ADC optimised for low 1/f noise and stability below 10 Hz with optical readout, not a general-purpose meter. The interface is fibre and FPGA, not a front panel with a display.

What is the difference between effective bits and digits?

Effective bits describe noise-limited resolution at a given bandwidth (CERN claims over 23 effective bits below 10 Hz). Digits are a marketing term for bench meters (e.g. 8.5 digits on a Keysight 3458A). They are not directly comparable—bandwidth, integration time and measurement conditions all matter.

Do I need to build the 19-inch enclosure?

No. The card can run standalone using its isolated USB interface, or you can read the plastic optical fibre with a simple interface board (the FAQ points to the schematic sheet). The 19-inch chassis is for integration into lab or accelerator racks.

Where do I get the PCB made?

Any board house that handles multilayer boards. The production files are on CERN EDMS, linked from the project wiki. If you do not have reflow capability, look for a service that offers assembly (you will need to supply the BOM).

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Discussion1

FROM THE COMPAREE TEAM

CERN contracted more than a hundred of these for the High-Luminosity LHC, and the whole design is published under the CERN Open Hardware Licence. If you had over 23 effective bits below 10 Hz with optical isolation, what would you measure?

CompareeTEAM1mo agoedited

Practical notes from our verification: the git repository itself holds almost nothing; the documentation is in the project wiki, which links the current V4 production documentation on CERN EDMS (main module, ADC mezzanine, power supply and 19-inch chassis) together with specifications, an FAQ, a description of the optical-fibre protocol, an evaluation report and an IEEE paper on the metrological characterization, plus a forum. There is no hobbyist-style assembly guide, and Marco Reps' build-and-test video is the best walkthrough you will find. Read-out is over plastic optical fibre, with an optional isolated USB interface for standalone use; changing the 10 kSPS sample rate would need changes to the FPGA code and firmware. The biggest gotcha is the resolution claim: the effective resolution of over 23 bits is specified only for bandwidths below 10 Hz, and full performance relies on the built-in Peltier temperature stabilization. If you need low 1/f noise and optical isolation for a specific task and you can handle the bring-up, the design is sound. If you want a multimeter, buy a multimeter. Correction (4 October 2026): we re-checked this page line by line against the project's own repository, documentation and videos, and fixed errors in earlier versions.

Nikolai Beev, CERN TE-EPC

Nikolai Beev designed the HPM7177 in CERN's TE-EPC group as a metrology-grade digitiser for the most demanding magnet power converters of the High-Luminosity LHC. Prototypes were tested in 2019, a revised version followed in 2020, and the design is published under the CERN Open Hardware Licence.

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